• EP2S60F1020C4 Package
EP2S60F1020C4 Package

EP2S60F1020C4

在庫あり:5,383

EP2S60F1020C4 is a high-quality FPGAs from Intel with a supply voltage range of 1.2 V ~ 1.2 V with a operating temperature range of 0 C ~ + 70 C

迅速な見積もり

見積もりリクエストを送信してください EP2S60F1020C4 このフォームを使用してください。また、次の電子メールでご連絡いただくこともできます Email: [email protected], 12時間以内に返信させていただきます。

  • 90日間のアフター保証
  • 365日の品質保証
  • 正規品保証
  • 7*24時間年中無休のサービス保証

仕様

以下は、選択された部品の特性やカテゴリーに関する基本的なパラメータである。

Product Category FPGA - Field Programmable Gate Array Shipping Restrictions This product may require additional documentation to export from the United States.
RoHS N Series Stratix II EP2S60
Number of Logic Elements 60440 LE Adaptive Logic Modules - ALMs 24176 ALM
Embedded Memory 2.43 Mbit Number of I/Os 718 I/O
Supply Voltage - Min 1.2 V Supply Voltage - Max 1.2 V
Minimum Operating Temperature 0 C Maximum Operating Temperature + 70 C
Mounting Style SMD/SMT Package / Case FBGA-1020
Brand Intel / Altera Moisture Sensitive Yes
Number of Logic Array Blocks - LABs 3022 LAB Operating Supply Current 500 mA
Operating Supply Voltage 1.2 V Product Type FPGA - Field Programmable Gate Array
Factory Pack Quantity 24 Subcategory Programmable Logic ICs
Total Memory 2544192 bit Tradename Stratix II
Part # Aliases 972356

概要 EP2S60F1020C4

The EP2S60F1020C4 is engineered to meet the demands of modern high-performance electronic systems, delivering high-speed interfaces and advanced functionality. Its design and capacity make it a valuable asset for engineers and developers seeking to implement custom digital circuits with precision and reliability

主な特長

  • The Stratix II family offers the following
  • features:
  • 15,600 to 179,400 equivalent LEs; see Table 1–1
  • New and innovative adaptive logic module (ALM), the basic building block of the Stratix II architecture, maximizes performance and resource usage efficiency
  • Up to 9,383,040 RAM bits (1,172,880 bytes) available without reducing logic resources
  • TriMatrix memory consisting of three RAM block sizes to implement true dual-port memory and first-in first-out (FIFO) buffers
  • High-speed DSP blocks provide dedicated implementation of multipliers (at up to 450 MHz), multiply-accumulate functions, and finite impulse response (FIR) filters
  • Up to 16 global clocks with 24 clocking resources per device region
  • Clock control blocks support dynamic clock network enable/disable, which allows clock networks to power down to reduce power consumption in user mode
  • Up to 12 PLLs (four enhanced PLLs and eight fast PLLs) per device provide spread spectrum, programmable bandwidth, clock switchover, real-time PLL reconfiguration, and advanced multiplication and phase shifting
  • Support for numerous single-ended and differential I/O standards
  • High-speed differential I/O support with DPA circuitry for 1-Gbps performance
  • Support for high-speed networking and communications bus standards including Parallel RapidIO, SPI-4 Phase 2 (POS-PHY Level 4), HyperTransport™ technology, and SFI-4
  • Support for high-speed external memory, including DDR and DDR2 SDRAM, RLDRAM II, QDR II SRAM, and SDR SDRAM
  • Support for multiple intellectual property megafunctions from Altera MegaCore® functions and Altera Megafunction Partners Program (AMPPSM) megafunctions
  • Support for design security using configuration bitstream encryption
  • Support for remote configuration updates

保証と返品

保証、返品、および追加情報

  • QAと返品ポリシー ?

    部品の品質保証: 365 日

    返品・返金:90日以内

    返品・交換:90日以内

  • 配送と梱包 ?

    配送: たとえば、FedEx、JP、UPS、DHL、SAGAWA、YTC など。

    部品パッケージ保証: 100% ESD 帯電防止機能を備えた当社のパッケージは、高い強度と優れた緩衝機能を備えています。

  • 支払い ?

    たとえば、VISA、MasterCard、Western Union、PayPal、MoneyGram、楽天ペイなどのチャネルです。

    特定の支払いチャネルの好みや要件がある場合は、当社の営業チームにご連絡ください。

EP2S60F1020C4 Package

EP2S60F1020C4

CMOS-based FPGA with 1020-pin PBGA package

在庫:

5,383