85411AMILF

The versatility of the 85411I extends to its compatibility with various differential input levels, allowing for seamless integration with different signal sources. This flexibility, combined with its low skew and high performance attributes, makes the 85411I a valuable asset in ensuring precise and synchronized clock distribution. With its reliable operation and repeatable results, this fanout buffer is a trusted solution for applications where timing accuracy is essential for optimal performance

主な特長

• Two differential LVDS outputs
• One differential CLK, nCLK clock input
• CLK, nCLK pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
• Maximum output frequency: 650MHz
• Translates any single ended input signal to LVDS levels with resistor bias on nCLK input
• Output skew: 25ps (maximum)
• Part-to-part skew: 300ps (maximum)
• Additive phase jitter, RMS: 0.05ps (typical)
• Propagation delay: 2.5ns (maximum)
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in lead free (RoHS 6) package